UCAS and Collaborators Achieve Progress in 3D Integration of 2D Semiconductors

  • 高塬
  • Published: 2024-06-01
  • 245

As the silicon technology approaches its physical limits for further shrinking the lateral size of transistors, bottom-up three dimensional (3D) van der Waals (vdW) integrability may provide an alternative approach to continue scaling transistors in the so-called post-Moore’s-law age. This method provides the capability of z-dimensional stacking, in principle of an unlimited number of layers. This viewpoint is supported by related research plans released by semiconductor companies like Samsung and TSMC at the international Electron Devices Meeting (IEDM), in December 2023.

Recently, the research group led by Professor Wu Zhou from the University of Chinese Academy of Sciences, in collaboration with research groups led by Professor Han Zheng from Shanxi University, Associate Researcher Hanwen Wang from the Liaoning Materials Laboratory, Professor Yanglong Hou from Sun Yat-sen University, and Researcher Xiuyan Li from the Institution of Metal Research, Chinese Academy of Science, proposed a novel p-type doping strategy for 2D semiconductors via strong vdW interfacial coupling, which is simple and non-destructive. Furthermore, vertically constructed complementary logic, including inverters with 6 vdW layers, NANDs with 14 vdW layers and SRAMs with 14 vdW layers are demonstrated. This innovative approach breaks the fundamental limitations of silicon-based logic circuits and provides insights for the development of future 2D semiconductor devices to continue Morre’s Law.

Atomic-scale characterization of the cross-sectional structure of a NAND device, composed of 14 vdW layers, was conducted using a low-voltage aberration-corrected scanning transmission electron microscope. High-angle annular dark-field (HAADF) images and electron energy loss spectroscopy (EELS) chemical images confirmed atomically sharp interfaces among the key components (MoS2, CrOCl, and hBN layers) of the device. Density functional theory (DFT) calculations suggest that the interfacial-coupling-induced polarity inversion is the result of charge transfer from TMDs to CrOCl, followed by subtle e-e interactions in the surface state of CrOCl.

This research, titled “Van der Waals polarity-engineered 3D integration of 2D complementary logic”, was published online in Nature on May 29, 2024. The co-first authors of the paper are Yimeng Guo and postdoctor Jiangxu Li from the Institute of Metal Research, Chinese Academy of Sciences, Professor Xuepeng Zhan from Shandong University, Chunwen Wang from the University of Chinese Academy of Sciences, and Min Li from ShanghaiTech University. The co-corresponding authors are Researcher Xiuyan Li from the Institute of Metal Research, Chinese Academy of Seiences, Professor Yanglong Hou from Sun Yat-sen University, Professor Wu Zhou from the University of Chinese Academy of Sciences, Associate Researcher Hanwen Wang from the Liaoning Materials Laboratory, and Professor Zheng Han from Shanxi University. Professor Runsheng Wang and doctoral student Zirui Wang from Peking University provided support in TCAD simulation. Professors Jing Zhang and Chengbing Qin from Shanxi University contributed to Raman measurements. Professor Yu Ye from Peking University provided CrOCl crystals and assistance with measurement. Professor Jianpeng Liu from ShanghaiTech University contributed to the DFT calculations. This research is supported by the National Key R&D Program of China, the National Natural Science Foundation of China (NSFC), Beijing Outstanding Young Scientist Program, and CAS Project for Young Scientists in Basic Research. This research benefited from resources and support from the National Research Center for Materials Science in Shenyang, the Liaoning Materials Laboratory, the State Key Laboratory of Quantum Optics and Optical Quantum Devices at Shanxi University, and Electron Microscopy Center at the University of Chinese Academy of Sciences.